{"id":133,"date":"2017-01-20T11:42:38","date_gmt":"2017-01-20T02:42:38","guid":{"rendered":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/?p=133"},"modified":"2017-01-20T11:42:38","modified_gmt":"2017-01-20T02:42:38","slug":"vtune-%e3%81%a7%e3%82%ad%e3%83%a3%e3%83%83%e3%82%b7%e3%83%a5%e3%81%ae%e3%83%92%e3%83%83%e3%83%88%e3%83%9f%e3%82%b9%e5%9b%9e%e6%95%b0%e3%82%92%e5%8f%96%e5%be%97%e3%81%99%e3%82%8b%e3%81%ab%e3%81%af","status":"publish","type":"post","link":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/2017\/01\/20\/vtune-%e3%81%a7%e3%82%ad%e3%83%a3%e3%83%83%e3%82%b7%e3%83%a5%e3%81%ae%e3%83%92%e3%83%83%e3%83%88%e3%83%9f%e3%82%b9%e5%9b%9e%e6%95%b0%e3%82%92%e5%8f%96%e5%be%97%e3%81%99%e3%82%8b%e3%81%ab%e3%81%af\/","title":{"rendered":"VTune \u3067\u30ad\u30e3\u30c3\u30b7\u30e5\u306e\u30d2\u30c3\u30c8\/\u30df\u30b9\u56de\u6570\u3092\u53d6\u5f97\u3059\u308b\u306b\u306f"},"content":{"rendered":"
VTune \u304c\u53ce\u96c6\u3059\u308b\u30a4\u30d9\u30f3\u30c8\u3067\u30ad\u30e3\u30c3\u30b7\u30e5\u306e\u30d2\u30c3\u30c8\/\u30df\u30b9\u56de\u6570<\/strong><\/span>\u3092\u53d6\u5f97\u3059\u308b\u3053\u3068\u304c\u3067\u304d\u307e\u3059\u3002<\/div>\n
\u30d7\u30ed\u30b0\u30e9\u30e0\u306e\u5b9f\u884c\u4e2d\u306b\u767a\u884c\u3055\u308c\u305f\u30ed\u30fc\u30c9\u547d\u4ee4\u306e\u5185\u3001\u4f55%\u3067\u30d2\u30c3\u30c8\u30df\u30b9\u304c\u767a\u751f\u3057\u305f\u304b\u78ba\u8a8d\u3057\u307e\u3059\u3002<\/div>\n
<\/div>\n
PMU(Performance\u00a0Monitoring Unit) \u304b\u3089\u53d6\u5f97\u53ef\u80fd\u306a\u30a4\u30d9\u30f3\u30c8\u540d\u306f\u3001\u30d7\u30ed\u30bb\u30c3\u30b5\u30fc\u4e16\u4ee3\u3054\u3068\u306b\u7570\u306a\u308b\u306e\u3067\u3001<\/div>\n
\u89e3\u6790\u5bfe\u8c61\u3068\u306a\u308b\u30d7\u30ed\u30b0\u30e9\u30e0\u304c\u52d5\u4f5c\u3057\u3066\u3044\u308b\u30d7\u30ed\u30bb\u30c3\u30b5\u30fc\u3092\u78ba\u8a8d\u3057\u305f\u4e0a\u3067\u89e3\u6790\u3092\u884c\u3044\u307e\u3059\u3002<\/div>\n
<\/div>\n
\u30d7\u30ed\u30bb\u30c3\u30b5\u30fc\u6bce\u306e\u30a4\u30d9\u30f3\u30c8\u60c5\u5831\u306f\u88fd\u54c1\u30c9\u30ad\u30e5\u30e1\u30f3\u30c8\u5185\u306e\u00a0help \u30d5\u30a9\u30eb\u30c0\u304b\u3089\u78ba\u8a8d\u3067\u304d\u307e\u3059\u3002<\/div>\n
<\/div>\n
\u4eca\u56de\u8a66\u3057\u305f\u74b0\u5883\u306b\u306f \u7b2c4\u4e16\u4ee3 Core \u30d7\u30ed\u30bb\u30c3\u30b5\u30fc\u304c\u642d\u8f09\u3055\u308c\u3066\u3044\u308b\u306e\u3067\u3001<\/div>\n
<\/div>\n
Events for Intel\u00ae Microarchitecture Code Name Haswell<\/div>\n
<\/div>\n
\u3092\u3082\u3068\u306b\u30e1\u30e2\u30ea\u30fc\u95a2\u9023\u3092\u4e2d\u5fc3\u306b\u53d6\u5f97\u3059\u308b\u30a4\u30d9\u30f3\u30c8\u3092\u307e\u3068\u3081\u307e\u3059<\/div>\n
<\/div>\n
\u203b\u6ce8\u610f<\/div>\n
\u30ad\u30e3\u30c3\u30b7\u30e5\u306e\u30d2\u30c3\u30c8\u30df\u30b9\u7387\u3092\u628a\u63e1\u3059\u308b\u3053\u3068\u304c\u76f4\u63a5\u306e\u30d1\u30d5\u30a9\u30fc\u30de\u30f3\u30b9\u6539\u5584\u306e\u30a2\u30d7\u30ed\u30fc\u30c1\u306b\u3064\u306a\u304c\u308b\u3053\u3068\u306f\u5c11\u306a\u3044\u3067\u3059\u3002<\/div>\n
\u30a2\u30af\u30bb\u30b9\u306b\u3088\u308b\u30ec\u30a4\u30c6\u30f3\u30b7\u30fc\u3092\u78ba\u8a8d\u3057\u305f\u3046\u3048\u3067\u3001\u3069\u306e\u95a2\u6570\u306e\u30d2\u30c3\u30c8\u30df\u30b9\u304c\u4e00\u756a\u30d1\u30d5\u30a9\u30fc\u30de\u30f3\u30b9\u306b\u5f71\u97ff\u3057\u3066\u3044\u308b\u304b<\/div>\n
\u628a\u63e1\u3059\u308b\u3053\u3068\u304c\u91cd\u8981\u3067\u3059\u3002<\/div>\n
\u5404\u30ad\u30e3\u30c3\u30b7\u30e5 \u30ec\u30d9\u30eb\u3001\u30e1\u30e2\u30ea\u30fc\u3054\u3068\u306e\u30a2\u30af\u30bb\u30b9\u30b3\u30b9\u30c8\u306f\u3001\u00a0Micro Architecture \u6bce\u306b\u30c9\u30ad\u30e5\u30e1\u30f3\u30c8\u306b\u8a18\u8f09\u3055\u308c\u3066\u3044\u308b\u306e\u3067\u3001<\/span><\/div>\n
\u78ba\u8a8d\u3059\u308b\u3053\u3068\u3092\u304a\u52e7\u3081\u3057\u307e\u3059\u3002<\/div>\n
<\/div>\n
——————————————————————————————————————–<\/div>\n
[\u4ed6\u306e L2 \u30ad\u30e3\u30c3\u30b7\u30e5\u306b\u30a2\u30af\u30bb\u30b9\u3057\u305f\u969b\u306e\u30a4\u30d9\u30f3\u30c8]<\/strong><\/span><\/div>\n
MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT<\/div>\n
MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM<\/div>\n
MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM_PS<\/div>\n
MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT_PS<\/div>\n
MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS<\/div>\n
MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS_PS<\/div>\n
MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_NONE<\/div>\n
MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_NONE_PS<\/div>\n
<\/div>\n
\u203bHITM = Hit modifiy<\/div>\n
<\/div>\n
[L3 \u30df\u30b9\u304b\u3089 DRAM \u306b\u30a2\u30af\u30bb\u30b9\u3092\u884c\u3063\u305f\u56de\u6570]<\/strong><\/span><\/div>\n
MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM<\/div>\n
MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM_PS<\/div>\n
<\/div>\n
[\u5404 \u30ad\u30e3\u30c3\u30b7\u30e5\u30ec\u30d9\u30eb\u3067 \u30d2\u30c3\u30c8\/\u30df\u30b9\u3057\u305f\u56de\u6570]<\/strong><\/span><\/div>\n
MEM_LOAD_UOPS_RETIRED.HIT_LFB<\/div>\n
(\u30ad\u30e3\u30c3\u30b7\u30e5\u30e9\u30a4\u30f3\u306f\u30d2\u30c3\u30c8\u3057\u3066\u3044\u308b\u3051\u3069\u3001\u30c7\u30fc\u30bf\u81ea\u4f53\u304c\u307e\u3060\u5bfe\u8c61\u306e\u30ad\u30e3\u30c3\u30b7\u30e5\u306b\u4e0a\u304c\u3063\u3066\u304d\u3066\u3044\u306a\u3044)<\/div>\n
MEM_LOAD_UOPS_RETIRED.HIT_LFB_PS<\/div>\n
MEM_LOAD_UOPS_RETIRED.L1_HIT<\/div>\n
MEM_LOAD_UOPS_RETIRED.L1_HIT_PS<\/div>\n
MEM_LOAD_UOPS_RETIRED.L1_MISS<\/div>\n
MEM_LOAD_UOPS_RETIRED.L1_MISS_PS<\/div>\n
MEM_LOAD_UOPS_RETIRED.L2_HIT<\/div>\n
MEM_LOAD_UOPS_RETIRED.L2_HIT_PS<\/div>\n
MEM_LOAD_UOPS_RETIRED.L2_MISS<\/div>\n
MEM_LOAD_UOPS_RETIRED.L2_MISS_PS<\/div>\n
MEM_LOAD_UOPS_RETIRED.L3_HIT<\/div>\n
MEM_LOAD_UOPS_RETIRED.L3_HIT_PS<\/div>\n
MEM_LOAD_UOPS_RETIRED.L3_MISS<\/div>\n
MEM_LOAD_UOPS_RETIRED.L3_MISS_PS<\/div>\n
<\/div>\n
\u203bLFB = Line Fill Buffer<\/div>\n
<\/div>\n
[\u30ed\u30fc\u30c9\u306b\u304b\u304b\u3063\u305f\u30ec\u30a4\u30c6\u30f3\u30b7\u30fc(CPU \u30b5\u30a4\u30af\u30eb\u6570)]<\/strong><\/span><\/div>\n
MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128<\/div>\n
MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16<\/div>\n
MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256<\/div>\n
MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32<\/div>\n
MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4<\/div>\n
MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512<\/div>\n
MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64<\/div>\n
MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8<\/div>\n
<\/div>\n
[\u30e1\u30e2\u30ea\u306e\u30ed\u30fc\u30c9\/\u30b9\u30c8\u30a2\u6570]<\/strong><\/span><\/div>\n
MEM_UOPS_RETIRED.ALL_LOADS<\/div>\n
MEM_UOPS_RETIRED.ALL_LOADS_PS<\/div>\n
MEM_UOPS_RETIRED.ALL_STORES<\/div>\n
MEM_UOPS_RETIRED.ALL_STORES_PS<\/div>\n
<\/div>\n
[\u30a2\u30c8\u30df\u30c3\u30af\u64cd\u4f5c\u3092\u884c\u3063\u305f\u56de\u6570]<\/strong><\/span><\/div>\n
MEM_UOPS_RETIRED.LOCK_LOADS<\/div>\n
MEM_UOPS_RETIRED.LOCK_LOADS_PS<\/div>\n
<\/div>\n
[\u30ad\u30e3\u30c3\u30b7\u30e5\u30e9\u30a4\u30f3\u3092\u8de8\u3044\u3060\u30a2\u30af\u30bb\u30b9\u56de\u6570]<\/strong><\/span><\/div>\n
MEM_UOPS_RETIRED.SPLIT_LOADS<\/div>\n
MEM_UOPS_RETIRED.SPLIT_LOADS_PS<\/div>\n
MEM_UOPS_RETIRED.SPLIT_STORES<\/div>\n
MEM_UOPS_RETIRED.SPLIT_STORES_PS<\/div>\n
<\/div>\n
[STLB( Second level TLB(Translation Lookaside Buffer)) \u306e\u30d2\u30c3\u30c8\u30df\u30b9\u56de\u6570]<\/strong><\/span><\/div>\n
MEM_UOPS_RETIRED.STLB_MISS_LOADS<\/div>\n
MEM_UOPS_RETIRED.STLB_MISS_LOADS_PS<\/div>\n
MEM_UOPS_RETIRED.STLB_MISS_STORES<\/div>\n
MEM_UOPS_RETIRED.STLB_MISS_STORES_PS<\/div>\n
<\/div>\n
——————————————————————————————————————–<\/div>\n
<\/div>\n
\u30ed\u30fc\u30ab\u30eb\/\u30ea\u30e2\u30fc\u30c8 DRAM<\/div>\n
NUMA \u69cb\u9020\u306e\u30b7\u30b9\u30c6\u30e0\u4e0a\u306b\u306f\u5404 CPU \u6bce\u306b\u5272\u308a\u5f53\u3066\u3089\u308c\u3066\u3044\u308b\u30e1\u30e2\u30ea\u304c\u3042\u308b\u3002<\/div>\n
\u5b9f\u884c\u4e2d\u306e CPU \u306b\u5272\u308a\u5f53\u3066\u3089\u308c\u3066\u3044\u308b\u30e1\u30e2\u30ea\u9818\u57df\u3092\u30ed\u30fc\u30ab\u30eb\u30e1\u30e2\u30ea\u3068\u3044\u3044\u3001<\/div>\n
\u4ed6\u306e CPU \u306b\u5272\u308a\u5f53\u3066\u3089\u308c\u3066\u3044\u308b\u30e1\u30e2\u30ea\u9818\u57df\u3092\u30ea\u30e2\u30fc\u30c8\u30e1\u30e2\u30ea\u3068\u3044\u3046<\/div>\n
<\/div>\n
\u30ed\u30fc\u30ab\u30ebDRAM : \u00a0\u5b9f\u884c\u4e2d\u306e\u30b3\u30a2\u76f4\u4e0b\u306b\u914d\u7f6e\u3055\u308c\u3066\u3044\u308bDRAM<\/div>\n
\u30ea\u30e2\u30fc\u30c8DRAM : \u00a0\u4ed6\u306eCPU\u76f4\u4e0b\u306b\u914d\u7f6e\u3055\u308c\u3066\u3044\u308bDRAM<\/div>\n
<\/div>\n
\n
\n

<\/p>\n

<\/div>\n<\/div>\n<\/div>\n
NUMA \u69cb\u9020\u306e\u4f8b (Global Memory \u306f\u591a\u304f\u306e\u5834\u5408\u8003\u3048\u306a\u3044)<\/div>\n
<\/div>\n
\u53c2\u8003<\/div>\n
[\u30ed\u30fc\u30ab\u30eb\/\u30ea\u30e2\u30fc\u30c8 DRAM]<\/div>\n
https:\/\/software.intel.com\/en-us\/node\/589919<\/a><\/div>\n
[L1\u3001L2\u3001L3(LL) \u30ad\u30e3\u30c3\u30b7\u30e5\u306e\u30d2\u30c3\u30c8\u56de\u6570\u3001\u30df\u30b9\u56de\u6570\u306e\u8a08\u6e2c]<\/div>\n
https:\/\/software.intel.com\/en-us\/articles\/cache-miss-rates-in-intel-vtune-amplifier-xe<\/a><\/div>\n
<\/div>\n","protected":false},"excerpt":{"rendered":"

VTune \u304c\u53ce\u96c6\u3059\u308b\u30a4\u30d9\u30f3\u30c8\u3067\u30ad\u30e3\u30c3\u30b7\u30e5\u306e\u30d2\u30c3\u30c8 […]<\/a><\/p>\n<\/div>","protected":false},"author":6,"featured_media":137,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[2],"tags":[],"class_list":["post-133","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-tech-tips"],"aioseo_notices":[],"_links":{"self":[{"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/posts\/133","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/users\/6"}],"replies":[{"embeddable":true,"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/comments?post=133"}],"version-history":[{"count":3,"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/posts\/133\/revisions"}],"predecessor-version":[{"id":136,"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/posts\/133\/revisions\/136"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/media\/137"}],"wp:attachment":[{"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/media?parent=133"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/categories?post=133"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.xlsoft.com\/jp\/blog\/intel\/wp-json\/wp\/v2\/tags?post=133"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}